ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 94

• Manufacturer Part Number: ISP1362BDTM
• Manufacturer: STEricsson

Specifications of ISP1362BDTM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

ISP1362_7
Product data sheet
Bit
Symbol
Reset
Access
14.6.2 HcDirectAddressLength register (R/W: 32h/B2h)
reserved
7
-
-
Table 78.
The HcDirectAddressLength register is used for direct addressing of the ISTL, INTL or
ATL buffers. This register specifies the starting address of the buffer and byte count of
data to be addressed. Therefore, it allows the programmer to randomly access the buffer.
The bit allocation of the register is given in
Code (Hex): 32 — read
Code (Hex): B2 — write
Bit
15 to 11
10
9
8
7
6
5
4
3
2
1
0
ISTL1_
Active
Status
R
6
0
Symbol
-
PairedPTDPingPong 0 — Ping of the paired PTD in ATL is active.
ISTL1BufferDone
ISTL0BufferDone
-
ISTL1_ActiveStatus
ISTL0_ActiveStatus
Reset_HWPingPong
Reg
ATL_Active
INTL_Active
ISTL1BufferFull
ISTL0BufferFull
HcBufferStatus register: bit description
ISTL0_
Status
Active
R
5
0
Rev. 07 — 29 September 2009
Reset_HW
PingPong
Description
reserved
1 — Pong of the paired PTD in ATL is active.
0 — The ISTL1 buffer has not yet been read by the host
controller.
1 — The ISTL1 buffer has been read by the host controller.
0 — The ISTL0 buffer has not yet been read by the host
controller.
1 — The ISTL0 buffer has been read by the host controller.
reserved
0 — The ISTL1 buffer is not accessed by the slave host.
1 — The ISTL1 buffer is accessed by the slave host.
0 — The ISTL0 buffer is not accessed by the slave host.
1 — The ISTL0 buffer is accessed by the slave host.
0 to 1 — Resets the internal hardware ping pong register to 0
when ATL_Active is 0. The hardware ping pong register can be
read from bit 10 of this register.
1 to 0 — Has no effect.
0 — The host controller does not process the ATL buffer.
1 — The host controller processes the ATL buffer.
0 — The host controller does not process the INTL buffer.
1 — The host controller processes the INTL buffer.
0 — The host controller does not process the ISTL1 buffer.
1 — The host controller processes the ISTL1 buffer.
0 — The host controller does not process the ISTL0 buffer.
1 — The host controller processes the ISTL0 buffer.
R/W
Reg
4
0
ATL_Active
Table
R/W
3
0
79.
Single-chip USB OTG controller
INTL_
Active
R/W
2
0
BufferFull
ISTL1
© ST-ERICSSON 2009. All rights reserved.
R/W
1
0
ISP1362
BufferFull
ISTL0
R/W
94 of 147
0
0