US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 98

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 3 Exception Handling
When system power is turned on or off, the RES pin should be held low.
Figure 3.1 shows the reset sequence starting from RES input.
See section 14.3.1, Power-On Reset Circuit, for information on the reset sequence for the
H8/38124 Group, which is equipped with an on-chip power-on reset circuit.
3.2.3
After a reset, if an interrupt were to be accepted before the stack pointer (SP: R7) was initialized,
PC and CCR would not be pushed onto the stack correctly, resulting in program runaway. To
prevent this, immediately after reset exception handling all interrupts are masked. For this reason,
the initial program instruction is always executed immediately after a reset. This instruction
should initialize the stack pointer (e.g. MOV.W #xx: 16, SP).
Rev. 8.00 Mar. 09, 2010 Page 76 of 658
REJ09B0042-0800
RES
φ
Internal
address bus
Internal read
signal
Internal write
signal
Internal data
bus (16-bit)
Interrupt Immediately after Reset
(1) Reset exception handling vector address (H'0000)
(2) Program start address
(3) First instruction of program
Figure 3.1 Reset Sequence
Vector fetch
Reset cleared
(2)
(1)
Internal
processing
Program initial
instruction prefetch
(2)
(3)