US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 48

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 2 CPU
2.1.2
The H8/300L CPU supports an address space of up to 64 Kbytes for storing program code and
data.
See section 2.8, Memory Map, for details of the memory map.
2.1.3
Figure 2.1 shows the register structure of the H8/300L CPU. There are two groups of registers: the
general registers and control registers.
Rev. 8.00 Mar. 09, 2010 Page 26 of 658
REJ09B0042-0800
Address Space
Register Configuration
General registers (Rn)
Control registers (CR)
[Legend]
SP:
PC:
CCR: Condition code register
I:
U:
H:
N:
Z:
V:
C:
15
7
Stack pointer
Program counter
Interrupt mask bit
User bit
Half-carry flag
Negative flag
Zero flag
Overflow flag
Carry flag
Figure 2.1 CPU Registers
R0H
R1H
R2H
R3H
R4H
R5H
R6H
R7H
CCR
(SP)
0 7
PC
7
I
U
6
H
5
U
4
R0L
R1L
R2L
R3L
R4L
R5L
R6L
R7L
N
3
Z
2
V
1
C
0
0
0

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