US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 112

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 3 Exception Handling
Wakeup Edge Select Register (WEGR)
WEGR is an 8-bit read/write register that specifies rising or falling edge sensing for pins WKPn.
WEGR is initialized to H'00 by a reset.
Bit n—WKPn Edge Select (WKEGSn)
Bit n selects WKPn pin input sensing.
Bit n
WKEGSn
0
1
3.3.3
There are 13 external interrupts: WKP7 to WKP0, IRQ4, IRQ3, IRQ1, IRQ0, and IRQAEC.
Interrupts WKP
Interrupts WKP7 to WKP0 are requested by either rising or falling edge input to pins WKP
WKP
rising or falling edge is input, the corresponding bit in IWPR is set to 1, requesting an interrupt.
Recognition of wakeup interrupt requests can be disabled by clearing the IENWP bit to 0 in
IENR1. These interrupts can all be masked by setting the I bit to 1 in CCR.
When WKP7 to WKP0 interrupt exception handling is initiated, the I bit is set to 1 in CCR.
Vector number 9 is assigned to interrupts WKP7 to WKP0. All eight interrupt sources have the
same vector number, so the interrupt-handling routine must discriminate the interrupt source.
Rev. 8.00 Mar. 09, 2010 Page 90 of 658
REJ09B0042-0800
Bit
Initial value
Read/Write
0
. When these pins are designated as pins WKP
External Interrupts
Description
WKPn pin falling edge detected
WKPn pin rising edge detected
WKEGS7
7
to WKP
R/W
7
0
WKEGS6
0
R/W
6
0
WKEGS5
R/W
5
0
WKEGS4
R/W
4
0
7
to WKP
WKEGS3
R/W
3
0
0
in port mode register 5 and a
WKEGS2
R/W
2
0
WKEGS1
R/W
1
0
(initial value)
WKEGS0
(n = 7 to 0)
R/W
0
0
7
to

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