US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 75

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2.5.8
Table 2.11 describes the block data transfer instruction. Figure 2.10 shows its object code format.
Table 2.11 Block Data Transfer Instruction
Instruction
EEPMOV
Certain precautions are required in using the EEPMOV instruction. See section 2.9.3, Notes on
Use of the EEPMOV Instruction, for details.
[Legend]
op:
rn:
IMM:
15
15
15
Block Data Transfer Instruction
Operation field
Register field
Immediate data
Size
—
op
Figure 2.9 System Control Instruction Codes
op
Function
If R4L ≠ 0 then
else next;
Block transfer instruction. Transfers the number of data bytes
specified by R4L from locations starting at the address indicated by
R5 to locations starting at the address indicated by R6. After the
transfer, the next instruction is executed.
8
8
8
repeat
until
op
7
7
7
@R5+ → @R6+
R4L – 1 → R4L
R4L = 0
IMM
Rev. 8.00 Mar. 09, 2010 Page 53 of 658
rn
0
0
0
RTE, SLEEP, NOP
LDC, STC (Rn)
ANDC, ORC,
XORC, LDC (#xx:8)
REJ09B0042-0800
Section 2 CPU