US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 223

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
This section only deals with the bits related to timer G and the watchdog timer. For the functions
of the bits, see the descriptions of port 3 (POF1) and port 4 (IRQ0).
Bit 2—Watchdog Timer Source Clock (WDCKS)
This bit selects the watchdog timer source clock. Note that stabilization times for the H8/38024,
H8/38024S, and H8/38024R Group and for the H8/38124 Group are different.
• H8/38024, H8/38024S, H8/38024R Group
Bit 2
WDCKS
0
1
• H8/38124 Group
Bit 2
WDCKS
0
1
Note: * See section 9.6, Watchdog Timer, for details.
Bit 1—TMIG Noise Canceller Select (NCS)
This bit selects controls the noise cancellation circuit of the input capture input signal (TMIG).
Bit 1
NCS
0
1
Description
Selects φ/8192
Selects φ
Description
Selects clock based on timer mode register W (TMW) setting *
Selects φ
Description
No noise cancellation circuit
Noise cancellation circuit
W
W
/32
/32
Rev. 8.00 Mar. 09, 2010 Page 201 of 658
Section 8 I/O Ports
REJ09B0042-0800
(initial value)
(initial value)
(initial value)

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