US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 117

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 3.5 shows a typical interrupt sequence.
SP − 4
SP − 3
SP − 2
SP − 1
SP (R7)
[Legend]
PC
PC
CCR:
SP:
Notes:
H
L
Figure 3.4 Stack State after Completion of Interrupt Exception Handling
:
:
2.
*
1.
Upper 8 bits of program counter (PC)
Lower 8 bits of program counter (PC)
Condition code register
Stack pointer
Prior to start of interrupt
Register contents must always be saved and restored by word access,
starting from an even-numbered address.
Ignored on return.
PC shows the address of the first instruction to be executed upon
return from the interrupt handling routine.
exception handling
Stack area
saved to stack
PC and CCR
SP (R7)
SP + 1
SP + 2
SP + 3
SP + 4
Rev. 8.00 Mar. 09, 2010 Page 95 of 658
After completion of interrupt
exception handling
CCR
CCR
Section 3 Exception Handling
PC
PC
H
L
*
REJ09B0042-0800
Even address