US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 367

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0)
Bits 1 and 0 select the clock source and enabling or disabling of clock output from the SCK
The combination of CKE1 and CKE0 determines whether the SCK
a clock output pin, or a clock input pin.
The CKE0 bit setting is only valid in case of internal clock operation (CKE1 = 0) in asynchronous
mode. In synchronous mode, or when external clock operation is used (CKE1 = 1), bit CKE0
should be cleared to 0.
After setting bits CKE1 and CKE0, set the operating mode in the serial mode register (SMR).
For details on clock source selection, see table 10.9.
Bit 1
CKE1
0
0
1
1
Notes: 1. Initial value
2. A clock with the same frequency as the bit rate is output.
3. Input a clock with a frequency 16 times the bit rate.
Bit 0
CKE0
0
1
0
1
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Synchronous
Communication Mode
Clock Source
Internal clock
Internal clock
Internal clock
Reserved
External clock
External clock
Reserved
Reserved
Description
Section 10 Serial Communication Interface
Rev. 8.00 Mar. 09, 2010 Page 345 of 658
32
pin functions as an I/O port,
SCK
I/O port *
Serial clock output *
Clock output *
Clock input *
Serial clock input
32
Pin Function
REJ09B0042-0800
1
3
2
1
32
pin.

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