US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 593

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

TCSRW—Timer Control/Status Register W
Notes: 1. Write is permitted only under certain conditions.
Bit
Initial value
Read/Write
2. 1 on the H8/38124 Group.
Bit 6 Write Inhibit
0
1
Bit 6 is write-enabled
Bit 6 is write-disabled
B6WI
R
7
1
Timer Counter W Write Enable
0
1
8-bit data cannot be written to TCW
8-bit data can be written to TCW
R/(W) *
TCWE
6
0
Bit 4 Write Inhibit
0
1
1
Bit 4 is write-enabled
Bit 4 is write-disabled
B4WI
R
5
1
Timer Control/Status Register W Write Enable
0
1
Data cannot be written to bits 2 and 0
Data can be written to bits 2 and 0
TCSRWE
R/(W) *
Bit 2 Write Inhibit
0
1
4
0
Bit 2 is write-enabled
Bit 2 is write-disabled
Watchdog Timer On
1
0
1
Rev. 8.00 Mar. 09, 2010 Page 571 of 658
Watchdog timer operation is disabled
Clearing conditions:
Reset *
while TCSRWE = 1
Watchdog timer operation is enabled
Setting condition:
0 is written in B2WI and 1 is written in WDON
while TCSRWE = 1
B2WI
Bit 0 Write Inhibit
R
3
1
0
1
2
, or 0 is written in both B2WI and WDON
H'B2
Bit 0 is write-enabled
Bit 0 is write-disabled
Watchdog Timer Reset
Appendix B Internal I/O Registers
0
1
R/(W) *
WDON
Clearing conditions:
Reset by RES pin
When TCSRWE = 1, and 0 is written
in both B0WI and WRST
Setting condition:
When TCW overflows and an internal
reset signal is generated
0 *
2
2
1
BOWI
R
1
1
REJ09B0042-0800
Watchdog Timer
R/(W) *
WRST
0
0
1