US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 397

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

• Receiving
Figure 10.13 shows an example of a flowchart for data reception. This procedure should be
followed for data reception after initializing SCI3.
Figure 10.13 Example of Data Reception Flowchart (Synchronous Mode)
Read bit RDRF
Clear bit RE to
Continue data
Read bit OER
Read receive
data in RDR
RDRF = 1?
reception?
0 in SCR3
OER = 1?
in SSR
in SSR
Start
End
No
Yes
No
[3]
[1]
[2]
Overrun error
processing
Yes
No
Yes
4
Clear bit OER to
error processing
error processing
End of overrun
Overrun error
Start overrun
processing
[4]
0 in SSR
[1]
[2]
[3]
[4]
Read bit OER in the serial status register
(SSR) to determine if there is an error.
If an overrun error has occurred, execute
overrun error processing.
Read SSR and check that bit RDRF is
set to 1. If it is, read the receive data in
RDR. When the RDR data is read, bit
RDRF is cleared to 0 automatically.
When continuing data reception, finish
reading of bit RDRF and RDR before
receiving the MSB (bit 7) of the current
frame. When the data in RDR is read,
bit RDRF is cleared to 0 automatically.
If an overrun error has occurred, read bit
OER in SSR, and after carrying out the
necessary error processing, clear bit OER
to 0. Reception cannot be resumed if bit
OER is set to 1.
Section 10 Serial Communication Interface
Rev. 8.00 Mar. 09, 2010 Page 375 of 658
REJ09B0042-0800