US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 62

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 2 CPU
2.5.1
Table 2.4 describes the data transfer instructions. Figure 2.5 shows their object code formats.
Table 2.4
Instruction
MOV
POP
PUSH
Note:
Certain precautions are required in data access. See section 2.9.1, Notes on Data Access, for
details.
Figure 2.7 lists the format of the bit manipulation instructions.
Rev. 8.00 Mar. 09, 2010 Page 40 of 658
REJ09B0042-0800
* Size: Operand size
Data Transfer Instructions
B:
W:
Data Transfer Instructions
Byte
Word
Size *
B/W
W
W
Function
(EAs) → Rd, Rs → (EAd)
Moves data between two general registers or between a general
register and memory, or moves immediate data to a general
register.
The Rn, @Rn, @(d:16, Rn), @aa:16, #xx:16, @–Rn, and @Rn+
addressing modes are available for word data. The @aa:8
addressing mode is available for byte data only.
The @–R7 and @R7+ modes require word operands. Do not
specify byte size for these two modes.
@SP+ → Rn
Pops a 16-bit general register from the stack. Equivalent to
MOV.W @SP+, Rn.
Rn → @–SP
Pushes a 16-bit general register onto the stack. Equivalent to
MOV.W Rn, @–SP.