US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 103

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Interrupt Enable Register 1 (IENR1)
IENR1 is an 8-bit read/write register that enables or disables interrupt requests.
Bit 7—Timer A Interrupt Enable (IENTA)
Bit 7 enables or disables timer A overflow interrupt requests.
Bit 7
IENTA
0
1
Bit 6—Reserved
Bit 6 is reserved: it can only be written with 0.
Bit 5—Wakeup Interrupt Enable (IENWP)
Bit 5 enables or disables WKP
Bit 5
IENWP
0
1
Bits 4 and 3—IRQ
Bits 4 and 3 enable or disable IRQ
Bit n
IENn
0
1
Bit
Initial value
Read/Write
Description
Disables timer A interrupt requests
Enables timer A interrupt requests
Description
Disables WKP
Enables WKP
Description
Disables interrupt requests from pin IRQn
Enables interrupt requests from pin IRQn
IENTA
R/W
4
7
0
and IRQ
7
7
to WKP
to WKP
7
3
W
6
Interrupt Enable (IEN4 and IEN3)
to WKP
4
and IRQ
0
0
IENWP
interrupt requests
interrupt requests
R/W
0
5
0
interrupt requests.
3
interrupt requests.
IEN4
R/W
4
0
Rev. 8.00 Mar. 09, 2010 Page 81 of 658
IEN3
R/W
3
0
IENEC2
Section 3 Exception Handling
R/W
2
0
IEN1
R/W
REJ09B0042-0800
1
0
(initial value)
(initial value)
(initial value)
(n = 4 or 3)
IEN0
R/W
0
0

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