US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 310

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 9 Timers
Bit 5—Timer Overflow Interrupt Enable (OVIE)
Bit 5 selects enabling or disabling of interrupt generation when TCG overflows.
Bit 5
OVIE
0
1
Bit 4—Input Capture Interrupt Edge Select (IIEGS)
Bit 4 selects the input capture input signal edge that generates an interrupt request.
Bit 4
IIEGS
0
1
Bits 3 and 2—Counter Clear 1 and 0 (CCLR1, CCLR0)
Bits 3 and 2 specify whether or not TCG is cleared by the rising edge, falling edge, or both edges
of the input capture input signal.
Bit 3
CCLR1
0
0
1
1
Rev. 8.00 Mar. 09, 2010 Page 288 of 658
REJ09B0042-0800
Bit 2
CCLR0
0
1
0
1
Description
TCG overflow interrupt request is disabled
TCG overflow interrupt request is enabled
Description
Interrupt generated on rising edge of input capture input signal
Interrupt generated on falling edge of input capture input signal
Description
TCG clearing is disabled
TCG cleared by falling edge of input capture input signal
TCG cleared by rising edge of input capture input signal
TCG cleared by both edges of input capture input signal
(initial value)
(initial value)
(initial value)

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