US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 387

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Figure 10.5 shows an example of a flowchart for initializing SCI3.
SCR3, and set bits
MPIE, and TEIE in
Clear bits TE and
Set bits TIE, RIE,
Set data transfer
Set value in BRR
RE to 0 in SCR3
Has 1-bit period
Set bit SPC32 to
Set bits CKE1
format in SMR
RE or TE to 1
1 in SPCR
and CKE0
elapsed?
in SCR3
Start
End
Yes
Figure 10.5 Example of SCI3 Initialization Flowchart
Wait
[1]
[2]
[3]
[4]
No
[1]
[2]
[3]
[4]
Set clock selection in SCR3. Be sure to
clear the other bits to 0. If clock output
is selected in asynchronous mode, the
clock is output immediately after setting
bits CKE1 and CKE0. If clock output is
selected for reception in synchronous
mode, the clock is output immediately
after bits CKE1, CKE0, and RE are
set to 1.
Set the data transfer format in the serial
mode register (SMR).
Write the value corresponding to the
transfer rate in BRR. This operation is
not necessary when an external clock
is selected.
Wait for at least one bit period, then set
bits TIE, RIE, MPIE, and TEIE in SCR3,
and set bits RE or TE to 1 in SCR3.
Setting bits TE and RE enables the TXD
and RXD
mode the mark state is established when
transmitting, and the idle state waiting for
a start bit when receiving.
Section 10 Serial Communication Interface
Rev. 8.00 Mar. 09, 2010 Page 365 of 658
32
pins to be used. In asynchronous
REJ09B0042-0800
32

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