US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 577

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
LVDCR—Low-Voltage Detection Control Register
Note: This register is implemented on the H8/38124 Group only.
Bit
Initial value
Read/Write
Note: * These bits are not initialized by resets trigged by LVDR. They are initialized by
LVD Enable
0 Low-voltage detection circuit not used (standby status) (initial value)
1 Low-voltage detection circuit use
Power Supply Drop (LVDD) Detection Level External Input Select
0 LVDD detection level generated by on-chip ladder resistor (initial value)
1 LVDD detection level input to extD pin
power-on resets and watchdog timer resets.
Power Supply Rise (LVDU) Detection Level External Input Select
0 LVDU detection level generated by on-chip ladder resistor (initial value)
1 LVDU detection level input to extU pin
LVDE
R/W
0 *
LVDR Detection Level Select
7
0 Reset detection voltage 2.3 V (typ.)
1 Reset detection voltage 3.3 V (typ.)
LVDR Enable
0 LVDR resets disabled
1 LVDR resets enabled
R/W
6
0
Voltage Drop Interrupt Enable
0 Voltage drop interrupt requests disabled (initial value)
1 Voltage drop interrupt requests enabled
VINTDSEL
Voltage Rise Interrupt Enable
0 Voltage rise interrupt requests disabled (initial value)
1 Voltage rise interrupt requests enabled
R/W
5
0
VINTUSEL
R/W
4
0
Rev. 8.00 Mar. 09, 2010 Page 555 of 658
LVDSEL
R/W
0 *
3
H'86
Appendix B Internal I/O Registers
(initial value)
LVDRE
R/W
0 *
2
(initial value)
LVDDE
R/W
1
0
REJ09B0042-0800
LVDUE
R/W
0
0
LVDC

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