US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 291

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Bit 3—Toggle Output Level L (TOLL)
Bit 3 sets the TMOFL pin output level. The output level is effective immediately after this bit is
written.
Bit 3
TOLL
0
1
Bits 2 to 0—Clock Select L (CKSL2 to CKSL0)
Bits 2 to 0 select the clock input to TCFL from among four internal clock sources or external
event input.
Bit 2
CKSL2
0
0
0
0
1
1
1
1
Note: * External event edge selection is set by IEG3 in the IRQ edge select register (IEGR). For
details, see IRQ Edge Select Register (IEGR) in section 3.3.2, Interrupt Control Registers.
Note that the timer F counter may increment if the setting of IRQ3 in port mode register 1
(PMR1) is changed from 0 to 1 or from 1 to 0 while the TMIF pin is low in order to change
the TMIF pin function.
Bit 1
CKSL1
0
0
1
1
0
0
1
1
Description
Low level
High level
Bit 0
CKSL0
0
1
0
1
0
1
0
1
Description
Counting on external event (TMIF) rising/falling edge *
Use prohibited
Internal clock: counting on φ/32
Internal clock: counting on φ/16
Internal clock: counting on φ/4
Internal clock: counting on φw/4
Rev. 8.00 Mar. 09, 2010 Page 269 of 658
REJ09B0042-0800
Section 9 Timers
(initial value)
(initial value)