US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 104

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 3 Exception Handling
Bit 2—IRQAEC Interrupt Enable (IENEC2)
Bit 2 enables or disables IRQAEC interrupt requests.
Bit 2
IENEC2
0
1
Bits 1 and 0—IRQ
Bits 1 and 0 enable or disable IRQ
Bit n
IENn
0
1
Interrupt Enable Register 2 (IENR2)
IENR2 is an 8-bit read/write register that enables or disables interrupt requests.
Bit 7—Direct Transfer Interrupt Enable (IENDT)
Bit 7 enables or disables direct transfer interrupt requests.
Bit 7
IENDT
0
1
Rev. 8.00 Mar. 09, 2010 Page 82 of 658
REJ09B0042-0800
Bit
Initial value
Read/Write
Description
Disables IRQAEC interrupt requests
Enables IRQAEC interrupt requests
Description
Disables interrupt requests from pin IRQn
Enables interrupt requests from pin IRQn
Description
Disables direct transfer interrupt requests
Enables direct transfer interrupt requests
IENDT
R/W
1
7
0
and IRQ
IENAD
R/W
0
6
0
Interrupt Enable (IEN1 and IEN0)
1
and IRQ
—
—
W
5
0
interrupt requests.
IENTG
R/W
4
0
IENTFH
R/W
3
0
IENTFL
R/W
2
0
IENTC
R/W
1
0
(initial value)
(initial value)
(initial value)
(n = 1 or 0)
IENEC
R/W
0
0