US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 154

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 5 Power-Down Modes
• When the on-chip oscillator is used
5.3.4
When a SLEEP instruction is executed in active (high-speed) mode or active (medium-speed)
mode while bit SSBY is set to 1 and bit LSON is cleared to 0 in SYSCR1, and bit TMA3 is
cleared to 0 in TMA, a transition is made to standby mode. At the same time, pins go to the high-
impedance state (except pins for which the pull-up MOS is designated as on). Port 5 of the
HD64F38024 retains the previous pin state. Figure 5.2 shows the timing in this case.
Rev. 8.00 Mar. 09, 2010 Page 132 of 658
REJ09B0042-0800
Internal data bus
8,192 states (STS2 = STS1 = STS0 = 0) is recommended if the on-chip oscillator is used on
the H8/38124 Group.
Pins
φ
Standby Mode Transition and Pin States
Active (high-speed) mode or active (medium-speed) mode
Figure 5.2 Standby Mode Transition and Pin States
SLEEP instruction fetch
Port output
SLEEP instruction execution
Fetch of next instruction
Internal processing
High-impedance
Standby mode

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