ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 811

• Manufacturer Part Number: ATEVK1105
• Description: KIT EVAL FOR AT32UC3A0
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1105

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A0512
• Processor Series: AVR
• Data Bus Width: 32 bit
• Interface Type: USART, TWI, USB, SPI, Ethernet
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A0512
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

41.5.6
41.5.7
32058J–AVR32–04/11
SDRAMC
USART
12. CPU cannot operate on a divided slow clock (internal RC oscillator)
13. LDM instruction with PC in the register list and without ++ increments Rp
14. RETE instruction does not clear SREG[L] from interrupts.
15. Exceptions when system stack is protected by MPU
2. Execute the RETE instruction.
1.
2.
1.
Fix/Workaround
Do not run the CPU on a divided slow clock.
For LDM with PC in the register list: the instruction behaves as if the ++ field is always set, ie
the pointer is always updated. This happens even if the ++ field is cleared. Specifically, the
increment of the pointer is done in parallel with the testing of R12.
Fix/Workaround
None.
The RETE instruction clears SREG[L] as expected from exceptions.
Fix/Workaround
When using the STCOND instruction, clear SREG[L] in the stacked value of SR before
returning from interrupts with RETE.
RETS behaves incorrectly when MPU is enabled and MPU is configured so that
system stack is not readable in unprivileged mode.
Fix/Woraround
Workaround 1: Make system stack readable in unprivileged mode,
or
Workaround 2: Return from supervisor mode using rete instead of rets. This
requires :
1. Changing the mode bits from 001b to 110b before issuing the instruction.
Updating the mode bits to the desired value must be done using a single mtsr
instruction so it is done atomically. Even if this step is described in general
as not safe in the UC technical reference guide, it is safe in this very
specific case.
Code execution from SDRAM does not work.
Fix/Workaround
Do not run code from SDRAM.
SDCKE rise at the same time as SDCK while exiting self-refresh mode.
Fix/Workaround
None.
Manchester encoding/decoding is not working.
Fix/Workaround
Do not use manchester encoding.
Code execution from external SDRAM does not work
SDRAM SDCKE rise at the same time as SDCK while exiting self-refresh mode
USART Manchester Encoder Not Working
811