ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 332

• Manufacturer Part Number: ATEVK1105
• Description: KIT EVAL FOR AT32UC3A0
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1105

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A0512
• Processor Series: AVR
• Data Bus Width: 32 bit
• Interface Type: USART, TWI, USB, SPI, Ethernet
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A0512
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.7.7
32058J–AVR32–04/11
RS485 Mode
The USART features the RS485 mode to enable line driver control. While operating in RS485
mode, the USART behaves as though in asynchronous or synchronous mode and configuration
of all the parameters is possible. The difference is that the RTS pin is driven high when the
transmitter is operating. The behavior of the RTS pin is controlled by the TXEMPTY bit. A typical
connection of the USART to a RS485 bus is shown in
Figure 26-36. Typical Connection to a RS485 Bus
The USART is set in RS485 mode by programming the MODE field in the Mode Register (MR)
to the value 0x1.
The RTS pin is at a level inverse to the TXEMPTY bit. Significantly, the RTS pin remains high
when a timeguard is programmed so that the line can remain driven after the last character com-
pletion.
transmission when the timeguard is enabled.
Figure 26-37. Example of RTS Drive with Timeguard
Figure 26-37 on page 332
Baud Rate
TXEMPTY
US_THR
TXRDY
Clock
Write
TXD
RTS
USART
Start
Bit
D0
RXD
TXD
RTS
gives an example of the RTS waveform during a character
D1
D2
D3
D4
D5
D6
Figure 26-36 on page
D7
Parity
Bit
Stop
Bit
Differential
Bus
TG = 4
AT32UC3A
332.
332