ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 528

• Manufacturer Part Number: ATEVK1105
• Description: KIT EVAL FOR AT32UC3A0
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1105

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A0512
• Processor Series: AVR
• Data Bus Width: 32 bit
• Interface Type: USART, TWI, USB, SPI, Ethernet
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A0512
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

30.7.3.13
30.7.3.13.1 Global Interrupts
30.7.3.13.2 Pipe Interrupts
30.7.3.13.3 DMA Interrupts
32058J–AVR32–04/11
Interrupts
See the structure of the USB host interrupt system on
There are two kinds of host interrupts: processing, i.e. their generation is part of the normal pro-
cessing, and exception, i.e. errors (not related to CPU exceptions).
The processing host global interrupts are:
There is no exception host global interrupt.
The processing host pipe interrupts are:
The exception host pipe interrupts are:
The processing host DMA interrupts are:
There is no exception host DMA interrupt.
•the Device Connection interrupt (DCONNI);
•the Device Disconnection interrupt (DDISCI);
•the USB Reset Sent interrupt (RSTI);
•the Downstream Resume Sent interrupt (RSMEDI);
•the Upstream Resume Received interrupt (RXRSMI);
•the Host Start of Frame interrupt (HSOFI);
•the Host Wake-Up interrupt (HWUPI);
•the Pipe X interrupt (PXINT);
•the DMA Channel X interrupt (DMAXINT).
•the Received IN Data interrupt (RXINI);
•the Transmitted OUT Data interrupt (TXOUTI);
•the Transmitted SETUP interrupt (TXSTPI);
•the Short Packet interrupt (SHORTPACKETI);
•the Number of Busy Banks interrupt (NBUSYBK).
•the Underflow interrupt (UNDERFI);
•the Pipe Error interrupt (PERRI);
•the NAKed interrupt (NAKEDI);
•the Overflow interrupt (OVERFI);
•the Received STALLed interrupt (RXSTALLDI);
•the CRC Error interrupt (CRCERRI).
•the End of USB Transfer Status interrupt (EOT_STA);
•the End of Channel Buffer Status interrupt (EOCH_BUFF_STA);
•the Descriptor Loaded Status interrupt (DESC_LD_STA).
Figure 30-6 on page
AT32UC3A
504.
528