ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 407

• Manufacturer Part Number: ATEVK1105
• Description: KIT EVAL FOR AT32UC3A0
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1105

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A0512
• Processor Series: AVR
• Data Bus Width: 32 bit
• Interface Type: USART, TWI, USB, SPI, Ethernet
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A0512
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27.7.4
Register Name:
Access Type:
Offset:
Reset Value:
• PS: Page Size
If page mode is enabled, this field indicates the size of the page in bytes.
Table 27-8.
• PMEN: Page Mode Enabled
1: Asynchronous burst read in page mode is applied on the corresponding chip select.
0: Standard read is applied.
• TDF_MODE: TDF Optimization
1: TDF optimization is enabled.
0: TDF optimization is disabled.
• TDF_CYCLES: Data Float Time
This field gives the integer number of clock cycles required by the external device to release the data after the rising edge
of the read controlling signal. The SMC always provide one full cycle of bus turnaround after the TDF_CYCLES period. The
32058J–AVR32–04/11
– The number of TDF wait states is optimized using the setup period of the next read/write access.
– The number of TDF wait states is inserted before the next access begins.
31
23
15
–
–
–
7
–
MODE Register
0
0
1
1
Page size settings.
30
22
14
MODE[0..3]
Read/Write
0x10 x CS_number + 0x0C
–
–
–
–
6
–
PS
0
1
0
1
29
21
13
–
5
EXNW_MODE
DBW
PS
TDF_MODE
Page Size
4-byte page
8-byte page
16-byte page
32-byte page
28
20
12
4
27
19
11
–
–
3
–
26
18
10
–
–
2
–
TDF_CYCLES
WRITE_MOD
25
17
–
9
–
1
E
AT32UC3A
READ_MODE
PMEN
BAT
24
16
8
0
407