ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 171

• Manufacturer Part Number: ATEVK1105
• Description: KIT EVAL FOR AT32UC3A0
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1105

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A0512
• Processor Series: AVR
• Data Bus Width: 32 bit
• Interface Type: USART, TWI, USB, SPI, Ethernet
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A0512
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.3.2
22.3.3
22.4
22.4.1
32058J–AVR32–04/11
Functional Description
Interrupt Lines
Power and Clock Management
Pull-up Resistor Control
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The GPIO interrupt lines are connected to the interrupt controller. Using the GPIO interrupt
requires the interrupt controller to be programmed first.
The clock for the GPIO is controlled by the power manager. The programmer must ensure that
the GPIO clock is enabled in the power manager before using the GPIO. The clock must be
enabled in order to access the configuration registers of the GPIO and when interrupts are
enabled. After configuring the GPIO, the clock can be disabled if interrupts are not enabled.
The GPIO controls the I/O lines of the microcontroller. The control logic associated with each pin
is represented in the figure below:
Figure 22-1. Overview of the GPIO pad connections
Each I/O line is designed with an embedded pull-up resistor. The pull-up resistor can be enabled
or disabled by accessing the corresponding bit in PUER (Pull-up Enable Register). Control of the
pull-up resistor is possible whether an I/O line is controlled by a peripheral or the GPIO.
Number of I/O pins.
Functions implemented on each pin.
Peripheral function(s) multiplexed on each I/O pin.
Reset state of registers.
Periph. A output enable
Periph. B output enable
Periph. C output enable
Periph. D output enable
Periph. A output data
Periph. B output data
Periph. C output data
Periph. D output data
Periph. C input data
Periph. D input data
Periph. A input data
Periph. B input data
GPIO_PMR1
GPIO_PMR0
GPIO_ODER
GPIO_OVR
GPIO_GPER
GPIO_PVR
Glitch Filter
GPIO_GFER
1
0
0
1
0
1
Edge Detector
GPIO_IMR1
GPIO_IMR0
GPIO_ODMER
GPIO_IER
0
1
0
1
1
0
GPIO_PUER
AT32UC3A
Interrupt Request
PAD
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