ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 661

KIT EVAL FOR AT32UC3A0

ATEVK1105

Manufacturer Part Number
ATEVK1105
Description
KIT EVAL FOR AT32UC3A0
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets

Specifications of ATEVK1105

Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A0512
Processor Series
AVR
Data Bus Width
32 bit
Interface Type
USART, TWI, USB, SPI, Ethernet
Operating Supply Voltage
3.3 V
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A0512
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A0
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
0 = Counter clock is not disabled when counter reaches RC.
1 = Counter clock is disabled when counter reaches RC.
• EEVTEDG: External Event Edge Selection
• EEVT: External Event Selection
Note:
• ENETRG: External Event Trigger Enable
0 = The external event has no effect on the counter and its clock. In this case, the selected external event only controls the
TIOA output.
1 = The external event resets the counter and starts the counter clock.
• WAVSEL: Waveform Selection
• WAVE = 1
0 = Waveform Mode is disabled (Capture Mode is enabled).
1 = Waveform Mode is enabled.
32058J–AVR32–04/11
0
0
1
1
0
1
0
1
0
0
1
1
1. If TIOB is chosen as the external event signal, it is configured as an input and no longer generates waveforms and subse-
quently no IRQs.
EEVTEDG
WAVSEL
EEVT
0
1
0
1
0
0
1
1
0
1
0
1
Effect
UP mode without automatic trigger on RC Compare
UP mode with automatic trigger on RC Compare
UPDOWN mode without automatic trigger on RC Compare
UPDOWN mode with automatic trigger on RC Compare
Edge
none
rising edge
falling edge
each edge
Signal selected as external event
TIOB
XC0
XC1
XC2
TIOB Direction
input
output
output
output
(1)
AT32UC3A
661

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