ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 244

• Manufacturer Part Number: ATEVK1105
• Description: KIT EVAL FOR AT32UC3A0
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1105

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A0512
• Processor Series: AVR
• Data Bus Width: 32 bit
• Interface Type: USART, TWI, USB, SPI, Ethernet
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A0512
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.13.7
24.13.7.1
Figure 24-28. Repeated Start + Reversal from Read to Write Mode
24.13.7.2
Figure 24-29. Repeated Start + Reversal from Write to Read Mode
Notes:
32058J-AVR32-04/11
TWI_RHR
TWI_RHR
TWI_THR
TWI_THR
TXCOMP
TXCOMP
EOSACC
EOSACC
SVREAD
SVREAD
RXRDY
RXRDY
SVACC
SVACC
TXRDY
TXRDY
TWD
TWD
1. In this case, if THR has not been written at the end of the read command, the clock is automatically stretched before the
2. TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
Reversal after a Repeated Start
ACK.
Reversal of Read to Write
Reversal of Write to Read
S
S
As soon as a START is detected
As soon as a START is detected
SADR
SADR
The master initiates the communication by a read command and finishes it by a write command.
Figure 24-28 on page 244
1. TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
The master initiates the communication by a write command and finishes it by a read com-
mand.Figure 24-29 on page 244
mode.
W
R
Read TWI_RHR
A
A
DATA0
DATA0
DATA0
A
A
DATA0
DATA1
DATA1
DATA1
describes the repeated start + reversal from Read to Write mode.
NA
A
describes the repeated start + reversal from Write to Read
DATA1
Sr
Sr
SADR
SADR
Cleared after read
Cleared after read
R
W
DATA2
A
A
DATA2
DATA2
DATA2
A
A
DATA3
AT32UC3A
DATA3
DATA3
DATA3
NA
A
P
P
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