AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 741
AT91SAM7S256D-AU
Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet
1.AT91SAM7S256D-AU.pdf
(775 pages)
Specifications of AT91SAM7S256D-AU
Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7S256D-AU
Manufacturer:
ATMEL
Quantity:
101
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40.23.7.5
40.23.8
40.23.8.1
40.23.8.2
40.23.8.3
40.23.8.4
40.23.8.5
When loading the TWI_RHR, the transfer direction is ignored. The last data byte received in the TWI_RHR is cor-
rupted at the end of the first subsequent transmit data byte. Neither RXRDY nor OVERRUN status bits are set if
this occurs.
The user must be sure that received data is read before transmitting any new data.
The Hardware Handshake does not work at speeds higher than 750 kbauds.
None.
When Hardware Handshaking is used and if CTS goes low near the end of the starting bit, a character can be lost.
CTS must not go low during a time slot occurring between 2 Master Clock periods before the starting bit and 16
Master Clock periods after the rising edge of the starting bit.
If CTS switches from 0 to 1 during the TX of a character and if the holding register (US_THR) is not empty, the con-
tent of US_THR will also be transmitted.
Don't use the PDC in transmit mode and do not fill US_THR before TXEMPTY is set at 1.
The XOFF character is sent only when the receive buffer is detected full. While the XOFF is being sent, the remote
transmitter is still transmitting. As only one Holding register is available in the receiver, characters will be lost in
reception. This makes the software handshaking functionality ineffective.
None.
The DCD signal is active at High level in the USART Modem Mode.
DCD should be active at Low level.
Add an inverter.
Universal Synchronous Asynchronous Receiver Transmitter (USART)
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
USART: CTS in Hardware Handshaking
TWI: Possible Receive Holding Register Corruption
USART: Hardware Handshake
USART: Hardware Handshaking – Two Characters Sent
USART: XOFF Character Bad Behavior
USART: DCD is active High instead of Low
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
741
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