AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 60

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

13.3.4
13.3.4.1
Figure 13-4. Power-up Reset
The Reset State Manager handles the different reset sources and generates the internal reset signals. It reports
the reset status in the field RSTTYP of the Status Register (RSTC_SR). The update of the field RSTTYP is per-
formed when the processor reset is released.
When VDDCORE is powered on, the Main Supply POR cell output is filtered with a start-up counter that operates
at Slow Clock. The purpose of this counter is to ensure that the Slow Clock oscillator is stable before starting up the
device.
The startup time, as shown in
the startup time, the reset signals are released and the field RSTTYP in RSTC_SR reports a Power-up Reset.
When VDDCORE is detected low by the Main Supply POR Cell, all reset signals are asserted immediately.
periph_nreset
Reset States
Main Supply
POR output
proc_nreset
(nrst_out)
Power-up Reset
SLCK
NRST
MCK
Startup Time
Figure
13-4, is hardcoded to comply with the Slow Clock Oscillator startup time. After
Processor Startup
EXTERNAL RESET LENGTH
= 3 cycles
= 2 cycles
SAM7S Series [DATASHEET]
Freq.
6175M–ATARM–26-Oct-12
Any
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