AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 367

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AT91SAM7S256D-AU

Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet

Specifications of AT91SAM7S256D-AU

Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm

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Figure 31-6. SAM7S512/256/128 Fractional Baud Rate Generator
31.6.1.4
31.6.1.5
Table 31-3.
DI field
Di (decimal)
SCK
If the USART is programmed to operate in synchronous mode, the selected clock is simply divided by the field CD
in US_BRGR.
In synchronous mode, if the external clock is selected (USCLKS = 3), the clock is provided directly by the signal on
the USART SCK pin. No division is active. The value written in US_BRGR has no effect. The external clock fre-
quency must be at least 4.5 times lower than the system clock.
When either the external clock SCK or the internal clock divided (MCK/DIV) is selected, the value programmed in
CD must be even if the user has to ensure a 50:50 mark/space ratio on the SCK pin. If the internal clock MCK is
selected, the Baud Rate Generator ensures a 50:50 duty cycle on the SCK pin, even if the value programmed in
CD is odd.
The ISO7816 specification defines the bit rate with the following formula:
where:
Di is a binary value encoded on a 4-bit field, named DI, as represented in
Reserved
• B is the bit rate
• Di is the bit-rate adjustment factor
• Fi is the clock frequency division factor
• f is the ISO7816 clock frequency (Hz)
MCK/DIV
BaudRate
MCK
Baud Rate in Synchronous Mode
Baud Rate in ISO 7816 Mode
Binary and Decimal Values for Di
USCLKS
0001
0
1
2
3
1
B
=
=
SelectedClock
-----------------------------------------
Di
----- -
Fi
×
f
CD
0010
16-bit Counter
CD
2
Modulus
Control
FP
0011
4
glitch-free
USCLKS = 3
logic
FP
0100
8
SYNC
0
CD
>1
1
0
0101
16
1
0
Table
SAM7S Series [DATASHEET]
0110
OVER
32
31-3.
Sampling
Divider
FIDI
6175M–ATARM–26-Oct-12
1000
12
0
1
SYNC
SCK
Baud Rate
Sampling
Clock
Clock
1001
20
367

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