AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 481
AT91SAM7S256D-AU
Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet
1.AT91SAM7S256D-AU.pdf
(775 pages)
Specifications of AT91SAM7S256D-AU
Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm
Available stocks
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Price
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Part Number:
AT91SAM7S256D-AU
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34. Pulse Width Modulation Controller (PWM)
34.1
34.2
overview
The PWM macrocell controls several channels independently. Each channel controls one square output waveform.
Characteristics of the output waveform such as period, duty-cycle and polarity are configurable through the user
interface. Each channel selects and uses one of the clocks provided by the clock generator. The clock generator
provides several clocks resulting from the division of the PWM macrocell master clock.
All PWM macrocell accesses are made through APB mapped registers.
Channels can be synchronized, to generate non overlapped waveforms. All channels integrate a double buffering
system in order to prevent an unexpected output waveform while modifying the period or the duty-cycle.
Block Diagram
Figure 34-1. Pulse Width Modulation Controller Block Diagram
PMC
MCK
Clock Generator
Channel
Selector
Channel
Selector
PWMx
PWM0
Clock
Clock
APB Interface
Controller
PWM
Duty Cycle
Duty Cycle
Counter
Counter
Update
Update
Period
Period
APB
Comparator
Comparator
Interrupt Generator
SAM7S Series [DATASHEET]
PIO
6175M–ATARM–26-Oct-12
AIC
PWMx
PWMx
PWM0
PWM0
481
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