AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 506

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AT91SAM7S256D-AU

Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet

Specifications of AT91SAM7S256D-AU

Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm

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35.5.1.3
As indicated below, transfers are sequential events carried out on the USB bus.
Table 35-3.
Notes:
A status transaction is a special type of host-to-device transaction used only in a control transfer. The control trans-
fer must be performed using endpoints with no ping-pong attributes. According to the control sequence (read or
write), the USB device sends or receives a status transaction.
Control Transfers
Interrupt IN Transfer
(device toward host)
Interrupt OUT Transfer
(host toward device)
Isochronous IN Transfer
(device toward host)
Isochronous OUT Transfer
(host toward device)
Bulk IN Transfer
(device toward host)
Bulk OUT Transfer
(host toward device)
USB Transfer Event Definitions
1. Control transfer must use endpoints with no ping-pong attributes.
2. Isochronous transfers must use endpoints with ping-pong attributes.
3. Control transfers can be aborted using a stall handshake.
USB Transfer Events
(1) (3)
(2)
(2)
• Setup transaction > Data IN transactions > Status
• Setup transaction > Data OUT transactions > Status
• Setup transaction > Status IN transaction
• Data IN transaction > Data IN transaction
• Data OUT transaction > Data OUT transaction
• Data IN transaction > Data IN transaction
• Data OUT transaction > Data OUT transaction
• Data IN transaction > Data IN transaction
• Data OUT transaction > Data OUT transaction
OUT transaction
IN transaction
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
506

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