AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 339

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

Notes:
30.9.5.2
Figure 30-25. Write Access Ordered by a Master
Notes:
30.9.5.3
Figure 30-26. Master Performs a General Call
GCACC
SVACC
EOSVACC
TXD
SVREAD
RXRDY
SVACC
1. When SVACC is low, the state of SVREAD becomes irrelevant.
2. TXRDY is reset when data has been transmitted from TWI_THR to the shift register and set when this data has been
The write mode is defined as a data transmission from the master.
After a START or a REPEATED START, the decoding of the address starts. If the slave address is decoded,
SVACC is set and SVREAD indicates the direction of the transfer (SVREAD is low in this case).
Until a STOP or REPEATED START condition is detected, TWI stores the received data in the TWI_RHR register.
If a STOP condition or a REPEATED START + an address different from SADR is detected, SVACC is reset.
Figure 30-25 on page 339
1. When SVACC is low, the state of SVREAD becomes irrelevant.
2. RXRDY is set when data has been transmitted from the shift register to the TWI_RHR and reset when this data is read.
The general call is performed in order to change the address of the slave.
If a GENERAL CALL is detected, GACC is set.
After the detection of General Call, it is up to the programmer to decode the commands which come afterwards.
In case of a WRITE command, the programmer has to decode the programming sequence and program a new
SADR if the programming sequence matches.
Figure 30-26 on page 339
TWD
acknowledged or non acknowledged.
Write Operation
General Call
S
S
GENERAL CALL
GENERAL CALL
0000000 + W
ADR
TWI answers with a NACK
SADR does not match,
W
NA
describes the Write operation.
describes the General Call access.
WRITE command = 00000100X
A
RESET command = 00000110X
DATA
Reset or write DADD
Reset after read
NA
P/S/Sr
SADR
TWI answers with an ACK
A
SADR matches,
W A
DATA1
SVREAD has to be taken into account only while SVACC is active
Programming sequence
DATA
New SADR
A
A
DATA2
SAM7S Series [DATASHEET]
Read RHR
A
A
New SADR
DATA NA S/Sr
6175M–ATARM–26-Oct-12
A
P
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