AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 127
AT91SAM7S256D-AU
Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet
1.AT91SAM7S256D-AU.pdf
(775 pages)
Specifications of AT91SAM7S256D-AU
Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm
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20.2.3
20.2.4
20.2.4.1
Figure 20-3. SAM7S512/256/128/64/321/161Parallel Programming Timing, Write Sequence
Figure 20-4. SAM7S32/16 Parallel Programming Timing, Write Sequence
The following algorithm puts the device in Parallel Programming Mode:
Note:
An handshake is defined for read and write operations. When the device is ready to start a new operation (RDY
signal set), the programmer starts the handshake by clearing the NCMD signal. The handshaking is achieved once
NCMD signal is high and RDY is high.
For details on the write handshaking sequence, refer to
• Apply GND, VDDIO, VDDCORE, VDDFLASH and VDDPLL.
• Apply XIN clock within T
• Wait for T
• Start a read or write handshaking.
Entering Programming Mode
Programmer Handshaking
Write Handshaking
After reset, the device is clocked by the internal RC oscillator. Before clearing RDY signal, if an external clock (> 32
kHz) is connected to XIN, then the device switches on the external clock. Else, XIN input is not considered. A higher
frequency on XIN speeds up the programmer handshake.
POR_RESET
DATA[15:0]
MODE[3:0]
MODE[3:0]
DATA[7:0]
NVALID
NVALID
NCMD
NCMD
NOE
NOE
RDY
RDY
1
1
POR_RESET
2
2
if an external clock is available.
3
3
Figure
4
4
20-3,
Figure 20-4
5
5
SAM7S Series [DATASHEET]
and
Table
6175M–ATARM–26-Oct-12
20-4.
127
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