AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 44

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

11.2.4.3
11.2.5
All five exception modes also have a Saved Program Status Register (SPSR) that holds the CPSR of the task
immediately preceding the exception.
The ARM7TDMI
exceptions are:
Exceptions are generated by internal and external sources.
More than one exception can occur in the same time.
When an exception occurs, the banked version of R14 and the SPSR for the exception mode are used to save
state.
To return after handling the exception, the SPSR is moved to the CPSR, and R14 is moved to the PC. This can be
done in two ways:
The ARM instruction set is divided into:
ARM instructions can be executed conditionally. Every instruction contains a 4-bit condition code field (bit[31:28]).
Table 11-2
Table 11-2.
Mnemonic
MOV
ADD
SUB
RSB
CMP
TST
• two interrupt disable bits (one for each type of interrupt)
• one bit to indicate ARM or Thumb execution
• five bits to encode the current processor mode
• fast interrupt (FIQ)
• normal interrupt (IRQ)
• memory aborts (used to implement memory protection or virtual memory)
• attempted execution of an undefined instruction
• software interrupts (SWIs)
• by using a data-processing instruction with the S-bit set, and the PC as the destination
• by using the Load Multiple with Restore CPSR instruction (LDM)
• Branch instructions
• Data processing instructions
• Status register transfer instructions
• Load and Store instructions
• Coprocessor instructions
• Exception-generating instructions
ARM Instruction Set Overview
Exception Types
gives the ARM instruction mnemonic list.
ARM Instruction Mnemonic List
Operation
Move
Add
Subtract
Reverse Subtract
Compare
Test
supports five types of exception and a privileged processing mode for each type. The types of
Mnemonic
CDP
MVN
ADC
SBC
RSC
CMN
Operation
Coprocessor Data Processing
Move Not
Add with Carry
Subtract with Carry
Reverse Subtract with Carry
Compare Negated
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
44