AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 499
AT91SAM7S256D-AU
Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet
1.AT91SAM7S256D-AU.pdf
(775 pages)
Specifications of AT91SAM7S256D-AU
Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7S256D-AU
Manufacturer:
ATMEL
Quantity:
101
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34.6.12
Register Name:
Access Type:
• CNT: Channel Counter Register
Internal counter value. This register is reset when:
34.6.13
Register Name:
Access Type:
This register acts as a double buffer for the period or the duty cycle. This prevents an unexpected waveform when modify-
ing the waveform period or duty-cycle.
Only the first 16 bits (internal channel counter size) are significant.
• the channel is enabled (writing CHIDx in the PWM_ENA register).
• the counter reaches CPRD value defined in the PWM_CPRDx register if the waveform is left aligned.
CPD (PWM_CMRx Register)
31
23
15
31
23
15
7
7
PWM Channel Counter Register
PWM Channel Update Register
0
1
30
22
14
30
22
14
6
6
PWM_CCNT[0..X-1]
Read-only
PWM_CUPD[0..X-1]
Write-only
The duty-cycle (CDTC in the PWM_CDRx register) is updated with the CUPD value at the
beginning of the next period.
The period (CPRD in the PWM_CPRx register) is updated with the CUPD value at the beginning
of the next period.
29
21
13
29
21
13
5
5
28
20
12
28
20
12
4
4
CUPD
CUPD
CUPD
CUPD
CNT
CNT
CNT
CNT
27
19
11
27
19
11
3
3
26
18
10
26
18
10
2
2
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
25
17
25
17
9
1
9
1
24
16
24
16
8
0
8
0
499
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