AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 73

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

14. Real-time Timer (RTT)
14.1
14.2
Figure 14-1. Real-time Timer
14.3
SLCK
RTT_MR
Overview
The Real-time Timer is built around a 32-bit counter and used to count elapsed seconds. It generates a periodic
interrupt or/and triggers an alarm on a programmed value.
Block Diagram
Functional Description
The Real-time Timer is used to count elapsed seconds. It is built around a 32-bit counter fed by Slow Clock divided
by a programmable 16-bit value. The value can be programmed in the field RTPRES of the Real-time Mode Regis-
ter (RTT_MR).
Programming RTPRES at 0x00008000 corresponds to feeding the real-time counter with a 1 Hz signal (if the Slow
Clock is 32.768 Hz). The 32-bit counter can count up to 2
roll over to 0.
The Real-time Timer can also be used as a free-running timer with a lower time-base. The best accuracy is
achieved by writing RTPRES to 3. Programming RTPRES to 1 or 2 is possible, but may result in losing status
events because the status register is cleared two Slow Clock cycles after read. Thus if the RTT is configured to trig-
ger an interrupt, the interrupt occurs during 2 Slow Clock cycles after reading RTT_SR. To prevent several
executions of the interrupt handler, the interrupt must be disabled in the interrupt handler and re-enabled when the
status register is clear.
The Real-time Timer value (CRTV) can be read at any time in the register RTT_VR (Real-time Value Register). As
this value can be updated asynchronously from the Master Clock, it is advisable to read this register twice at the
same value to improve accuracy of the returned value.
RTTRST
reload
Divider
16-bit
RTT_MR
RTPRES
RTT_VR
RTT_AR
RTT_MR
RTTRST
0
1
Counter
CRTV
32-bit
ALMV
0
RTT_SR
RTT_SR
32
RTT_SR
=
seconds, corresponding to more than 136 years, then
read
reset
reset
set
set
RTTINC
ALMS
SAM7S Series [DATASHEET]
RTTINCIEN
RTT_MR
RTT_MR
ALMIEN
6175M–ATARM–26-Oct-12
rtt_alarm
rtt_int
73