HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 74

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 2 CPU
Rev. 6.00 Jun. 12, 2007 Page 42 of 610
REJ09B0131-0600
Instruction
DMULU.L
DT
EXTS.B Rm,Rn
EXTS.W Rm,Rn
EXTU.B Rm,Rn
EXTU.W Rm,Rn
MAC.L @Rm+,@Rn+
MAC.W @Rm+,@Rn+
MUL.L Rm,Rn
MULS.W Rm,Rn
MULU.W Rm,Rn
NEG
NEGC Rm,Rn
SUB
Rm,Rn
Rm,Rn
Rn
Rm,Rn
Operation
Unsigned operation of
Rn × Rm → MACH,
MACL 32 × 32 → 64 bits
Rn - 1 → Rn, if Rn = 0, 1 →
T, else 0 → T
A byte in Rm is sign-
extended → Rn
A word in Rm is sign-
extended → Rn
A byte in Rm is zero-
extended → Rn
A word in Rm is zero-
extended → Rn
Signed operation of (Rn)
× (Rm) + MAC → MAC,
32 × 32 + 64 → 64 bits
Signed operation of (Rn)
× (Rm) + MAC → MAC,
16 × 16 + 64 → 64 bits
Rn × Rm → MACL
32 × 32 → 32 bits
Signed operation of Rn
× Rm → MAC
16 × 16 → 32 bits
Unsigned operation of
Rn × Rm → MAC
16 × 16 → 32 bits
0-Rm → Rn
0-Rm-T → Rn,
Borrow → T
Rn-Rm → Rn
Code
0011nnnnmmmm0101
0100nnnn00010000
0110nnnnmmmm1110
0110nnnnmmmm1111
0110nnnnmmmm1100
0110nnnnmmmm1101
0000nnnnmmmm1111
0100nnnnmmmm1111
0000nnnnmmmm0111
0010nnnnmmmm1111
0010nnnnmmmm1110
0110nnnnmmmm1011
0110nnnnmmmm1010
0011nnnnmmmm1000
Execution
Cycles
2 to 5*
1
1
1
1
1
2 to 5*
2 to 4*
2 to 5*
1 (3)*
1 (3)*
1
1
1
T Bit
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Comparison
result
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Borrow
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