HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 60

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 2 CPU
Table 2.7
Note: Immediate data is referenced by @(disp,PC).
2.4.2
Table 2.8 lists addressing modes and effective address calculation methods.
Table 2.8
Rev. 6.00 Jun. 12, 2007 Page 28 of 610
REJ09B0131-0600
Type
16-bit displacement
Addressing
Mode
Register
direct
Register
indirect
Register
indirect with
post-increment
Addressing Modes
Access with Displacement
Addressing Modes and Effective Addresses
Instruction
Format
Rn
@Rn
@Rn+
CPU in this LSI
MOV.W @(disp,PC),R0
MOV.W @(R0,R1),R2
.DATA.W H'1234
Effective Address Calculation Method
Effective address is register Rn.
(Operand is register Rn contents.)
Effective address is register Rn contents.
Effective address is register Rn contents. A
constant is added to Rn after instruction
execution: 1 for a byte operand, 2 for a word
operand, 4 for a longword operand.
........
1/2/4
Rn
Rn
Rn + 1/2/4
+
Rn
Rn
Example of Other CPUs
MOV.W
R2
Calculation
Formula

Rn
Rn
After instruction
execution
Byte: Rn + 1 →
Rn
Word: Rn + 2 →
Rn
Longword: Rn + 4
→ Rn
@(H'1234,R1),