HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 31

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Table 14.6
Table 14.7
Table 14.8
Table 14.9
Table 14.10
Table 14.11
Section 15 Host Interface (HIF)
Table 15.1
Table 15.2
Table 15.3
Table 15.4
Table 15.5
Table 15.6
Section 16 Pin Function Controller (PFC)
Table 16.1
Table 16.2
Table 16.3
Table 16.4
Table 16.5
Table 16.6
Section 17 I/O Ports
Table 17.1
Table 17.2
Table 17.3
Table 17.4
Table 17.5
Section 18 User Break Controller (UBC)
Table 18.1
Section 19 User Debugging Interface (H-UDI)
Table 19.1
Table 19.2
Table 19.3
Table 19.4
Section 21 Electrical Characteristics
Table 21.1
Table 21.2
Table 21.3
Maximum Bit Rates with External Clock Input (Asynchronous Mode)............... 352
Maximum Bit Rates with External Clock Input (Synchronous Mode) ................. 352
SCSMR Settings and SCIF Communication Formats........................................... 363
SCSMR and SCSCR Settings and SCIF Clock Source Selection......................... 363
Pin Configuration.................................................................................................. 393
HIF Operations ..................................................................................................... 394
Memory Map ........................................................................................................ 409
Consecutive Write Procedure to HIFRAM by External DMAC........................... 416
Consecutive Read Procedure from HIFRAM by External DMAC....................... 417
Input/Output Control for HIF Pins........................................................................ 420
List of Multiplexed Pins (Port A) ......................................................................... 423
List of Multiplexed Pins (Port B).......................................................................... 423
List of Multiplexed Pins (Port C).......................................................................... 425
List of Multiplexed Pins (Port D) ......................................................................... 425
List of Multiplexed Pins (Port E).......................................................................... 426
Pin Functions in Each Operating Mode ................................................................ 427
Port A Data Register H (PADRH) Read/Write Operation .................................... 458
Port B Data Register L (PBDRL) Read/Write Operation ..................................... 460
Port C Data Registers H and L (PCDRH and PCDRL) Read/Write Operation .... 463
Port D Data Register L (PDDRL) Read/Write Operation..................................... 465
Port E Data Registers H, L (PEDRH, PEDRL) Read/Write Operation ................ 468
Data Access Cycle Addresses and Operand Size Comparison Conditions ........... 485
Pin Configuration.................................................................................................. 495
H-UDI Commands................................................................................................ 497
External pins and Boundary Scan Register Bits ................................................... 498
Reset Configuration .............................................................................................. 505
Absolute Maximum Ratings ................................................................................. 539
Recommended Timing at Power-On..................................................................... 540
Recommended Timing in Power-Off.................................................................... 541
Serial Communication Formats (Asynchronous Mode).................................... 365
SCIF Interrupt Sources ..................................................................................... 383
Rev. 6.00 Jun. 12, 2007 Page xxxi of xxxii