HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 435

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

15.4.5
HIFIICR is a 32-bit register used to issue interrupts from an external device connected to the HIF
to the on-chip CPU. Access to HIFIICR by an external device should be performed with HIFIICR
specified by bits REG5 to REG0 in HIFIDX and the HIFRS pin low.
15.4.6
HIFEICR is a 32-bit register used to issue interrupts to an external device connected to the HIF
from this LSI. Access to HIFEICR by an external device should be performed with HIFEICR
specified by bits REG5 to REG0 in HIFIDX and the HIFRS pin low.
Bit
31 to 8 —
7
6
5
4
3
2
1
0
Bit
31 to 8 —
Bit Name
IIC6
IIC5
IIC4
IIC3
IIC2
IIC1
IIC0
IIR
Bit Name
HIF Internal Interrupt Control Register (HIFIICR)
HIF External Interrupt Control Register (HIFEICR)
Initial
Value
All 0
0
0
0
0
0
0
0
0
Initial
Value
All 0
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Internal Interrupt Source
These bits specify the source for interrupts generated by
the IIR bit. These bits can be written to from both an
external device and the on-chip CPU. By using these
bits, fast execution of interrupt exception handling is
possible. These bits are completely under software
control, and their values have no effect on the operation
of this LSI.
Internal Interrupt Request
While this bit is 1, an interrupt request (HIFI) is issued to
the on-chip CPU.
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 6.00 Jun. 12, 2007 Page 403 of 610
Section 15 Host Interface (HIF)
REJ09B0131-0600