HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 351

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HD6417618

Manufacturer Part Number
HD6417618
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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13.3
13.3.1
When an internal clock is selected with bits CKS1 and CKS0 in CMCSR and the STR bit in
CMSTR is set to 1, CMCNT starts incrementing using the selected clock. When the values in
CMCNT and CMCOR match, CMCNT is cleared to H'0000 and the CMF flag in CMCSR is set
to 1. When the CMIE bit in CMCSR is set to 1, a compare match interrupt (CMI) is requested.
CMCNT then starts counting up again from H'0000.
Figure 13.2 shows the operation of the compare match counter.
13.3.2
One of four internal clocks (Pφ/8, Pφ/32, Pφ/128, and Pφ/512) obtained by dividing the Pφ clock
can be selected with bits CKS1 and CKS0 in CMCSR. Figure 13.3 shows the timing.
Peripheral operating
Count clock
clock (Pφ)
CMCNT1
Operation
Interval Count Operation
CMCNT Count Timing
CMCOR1
H'0000
CMCNT1 value
clock
Nth
Figure 13.2 Counter Operation
Figure 13.3 Count Timing
N
Counter cleared by compare
match with CMCOR1
Rev. 6.00 Jun. 12, 2007 Page 319 of 610
Section 13 Compare Match Timer (CMT)
(N + 1)th
clock
Time
REJ09B0131-0600
N + 1

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