HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 386
HD6417618
Manufacturer Part Number
HD6417618
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417618.pdf
(646 pages)
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Section 14 Serial Communication Interface with FIFO (SCIF)
Rev. 6.00 Jun. 12, 2007 Page 354 of 610
REJ09B0131-0600
Bit
7
6
5
4
Bit Name
RTRG1
RTRG0
TTRG1
TTRG0
Initial
value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Receive FIFO Data Trigger
Set the specified receive trigger number. The receive
data full (RDF) flag in the serial status register (SCFSR)
is set when the number of receive data stored in the
receive FIFO register (SCFRDR) exceeds the specified
trigger number shown below.
•
•
Transmit FIFO Data Trigger 1 and 0
Set the specified transmit trigger number. The transmit
FIFO data register empty (TDFE) flag in the serial
status register (SCFSR) is set when the number of
transmit data in the transmit FIFO data register
(SCFTDR) becomes less than the specified trigger
number shown below.
00: 8 (8)*
01: 4 (12)*
10: 2 (14)*
11: 0 (16)*
Note: * Values in parentheses mean the number of
Asynchronous mode
00: 1
01: 4
10: 8
11: 14
Synchronous mode
00: 1
01: 2
10: 8
11: 14
remaining bytes in SCFTDR when the TDFE
flag is set to 1.
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