HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 137
HD6417618
Manufacturer Part Number
HD6417618
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417618.pdf
(646 pages)
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The bus state controller (BSC) outputs control signals for various types of memory that is
connected to the external address space and external devices. The BSC functions enable this LSI
to connect directly with SRAM, SDRAM, and other memory storage devices, and external
devices.
7.1
The BSC has the following features.
• External address space
• Normal space interface
• SDRAM interface
• Byte-selection SRAM interface
A maximum 32 or 64 Mbytes for each of the areas, CS0, CS3, CS4, CS5B, and CS6B,
A maximum 64 Mbytes for each of the six areas, CS0, CS3, CS4, CS5, and CS6, totally
Can specify the normal space interface, byte-selection SRAM, SDRAM, PCMCIA for each
Can select the data bus width (8 or 16 bits) for each address space
Can control the insertion of wait cycles for each address space
Can control the insertion of wait cycles for each read access and write access
Can control the insertion of idle cycles in the consecutive access for five cases
Supports the interface that can directly connect to the SRAM
Can connect directly to SDRAM in area 3
Multiplex output for row address/column address
Efficient access by single read/single write
High-speed access by bank-active mode
Supports auto-refreshing and self-refreshing
Can connect directly to byte-selection SRAM
totally 256 Mbytes (divided into five areas)
320 Mbytes (divided into five areas)
address space
independently: read-write (in same space/different space), read-read (in same
space/different space), or the first cycle is a write access
Features
Section 7 Bus State Controller (BSC)
Rev. 6.00 Jun. 12, 2007 Page 105 of 610
Section 7 Bus State Controller (BSC)
REJ09B0131-0600
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