TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 91

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

PB
(0022H)
PBCR
(0024H)
PBFC
(0025H)
PBODE
(002BH)
Note 1: Read-modify-write is prohibited for the registers PBCR, PBFC and PBODE.
Note 2: PB0/TA0IN pin does not have a register changing PORT/FUNCTION.
Note 3: PB1/RXD1 pin does not have a register changing PORT/FUNCTION.
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
For example, when it is used as an input port, the input signal is inputted to 8-bit timer.
For example, when it is used as an input port, the input signal is inputted to SIO as the serial receive data.
7
7
7
7
0: Port
1:
TB0OUT0
INT3
PB6C
PB6F
PB6
6
6
6
6
−
0
0
Figure 3.5.35 Register for Port B
(Output latch register is set to 1.)
0: Port
1:
0: Input
Data from external port
TA3OUT
PB5C
INT2
PB5F
PB5
Port B Function Register
5
Port B Control Register
5
5
5
−
0
0
Port B ODE Register
91C820A-89
Port B Register
R/W
W
W
0: Port
1:
1: Output
PB4C
INT1
PB4F
PB4
4
4
4
4
−
0
0
0: Port
1: INT0
PB3C
PB3F
PB3
3
3
3
3
−
0
0
<PB5F>
<PB6F>
<PB5C>
<PB6C>
0
1
0
1
2
2
2
2
INT2, TA3OUT setting
INT3, TB0OUT0 setting
Input port
Input port
INT2
INT3
0: Port
1:
0
0
(Note 3)
(Output latch register is
Data from external port
TA1OUT
PB1C
PB1F
0: Input 1: Output
PB1
1
1
1
0
1
0
set to 1.)
R/W
W
Output port
Output port
W
TB0OUT0
TA3OUT
TXD2
0: CMOS
1: Open
0:Port
1:TXD2
ODEPB0
TMP91C820A
drain
PB0C
PB0F
1
1
PB0
W
0
0
−
0
0
0
0
0
2008-02-20