TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 58

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

3.5
Port Name
Port C
Port 0
Port 1
Port 2
Port 3
Port 4
Port Z
Port 5
Port 6
Port 7
Port 8
Port 9
Port A
Port B
Port Functions
relate to the built-in CPU and internal I/Os. Table 3.5.1 and Table 3.5.2 list the functions of
each port pin. Table 3.5.3, Table 3.5.4 and Table 3.5.5 list I/O registers and their specifications.
The TMP91C820A features 126-bit settings which relate to the various I/O ports.
As well as general-purpose I/O port functionality, the port pins also have I/O functions which
P00 to P07
P10 to P17
P20 to P27
P30 to P37
P40 to P47
PZ0
PZ1
PZ2
PZ3
P56
P60
P61
P62
P63
P64
P65
P66
P67
P70
P71
P72
P73
P74
P75
P76
P77
P80 to P87
P90 to P97
PA0 to PA7
PB0
PB1
PB3
PB4
PB5
PB6
PC0
PC1
PC2
PC3
PC4
PC5
Pin Name
Number of
Pins
8
8
8
8
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
8
8
8
1
1
1
1
1
1
1
1
1
1
1
1
Table 3.5.1 Port Functions (1/2)
Direction
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
91C820A-56
PU
PU
PU
R
U
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Setting Unit
Direction
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
(R: PU = with programmable pull-up resistor)
(U = with pull-up resistor)
D0 to D7
D8 to D15
A16 to A23
A8 to A15
A0 to A7
EA24,
EA25,
SCK, OPTRX0
SO,
SI/SCL
MSK
VEECLK
AN0 to AN7,
KI0 to KI7
KO0 to KO7
TA0IN, TXD2
TA1OUT, RXD2
INT0
INT1
INT2, TA3OUT
INT3, TB0OUT0
TXD0
RXD0
SCLK0,
TXD1
RXD1
SCLK1,
R
RD
HWR
CS0
CS1
CS2
CS3
CS2C
CS2E
CS2F
CS2G
CSEXA
WR
WAIT
/
W
Pin Name for Built-in
,
,
SDA
,
,
SDCS
CS2A
,
SRWE
CS2B
CS2C
SRUB
SRLB
CTS0
CTS1
, OPTTX0
Function
ADTRG
TMP91C820A
(P83)
2008-02-20