TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 233

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TMP91xy20AFG

Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy20AFG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
TMP91C820A
2.
Disabling the clock
Carry of a clock is prohibited when write “0” to PAGER<ENATMR> and can
prevent malfunction by 1s carry hold circuit. During a clock prohibited, 1s carry
hold circuit holds one second carry signal, which is generated from divider. After
becoming clock enable state, output the carry signal to clock and revise time and
continue operation. However, clock is late when clock-disabling state continues for
one second or more.
Start
Disable the clock
Write the clock data
Enable the clock
End
Figure 3.13.5 Flowchart of Clock Disable
91C820A-231
2008-02-20

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