TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 160

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

(0209H)
SC1CR
Bit symbol
Read/Write
After reset
Function
Note:
As all error flags are cleared after reading, do not test only a single bit with a bit testing instruction.
Received
data bit8
Undefined
RB8
7
R
Figure 3.9.12 Serial Control Register (Channel 1, SC1CR)
Parity
0: Odd
1: Even
EVEN
6
0
R/W
Parity
addition
0: Disable
1: Enable
PE
5
0
91C820A-158
Overrun
OERR
4
0
R (Cleared to 0 when)
1: Error
PERR
Parity
0
3
Edge selection for SCLK pin (Input/output mode)
I/O interface input clock select
Framing error flag
Parity error flag
Overrun error flag
Framing
0
1
0
1
Parity addition enable
Even parity addition/check
Received data bit8
FERR
0
1
0
1
2
0
Baud rate generator
SCLK1 pin input
Transmits and receives
data on rising edge of SCLK1.
Transmits and receives
data on falling edge of SCLK1.
Disabled
Enabled
Odd parity
Even parity
0: SCLK1
1: SCLK1
SCLKS
1
0
R/W
0: Baud rate
1: SCLK1
generator
pin input
TMP91C820A
IOC
0
0
Cleared to “0”
when read
2008-02-20