TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 156

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TMP91xy20AFG

Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy20AFG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
SC0MOD0
(0202H)
3.9.3
Bit symbol
Read/Write
After reset
Function
SFRs
Figure 3.9.8 Serial Mode Control Register (Channel 0, SC0MOD0)
Transfer
data bit8
TB8
7
0
Handshake
0: CTS
1: CTS
disable
enable
CTSE
6
0
0: Receive
1: Receive
Receive
function
disable
enable
RXE
91C820A-154
5
0
0: Disable
1: Enable
Wakeup
function
WU
4
0
R/W
Serial transmission
mode
00: I/O interface mode
10: 8-bit UART mode
11: 9-bit UART mode
01: 7-bit UART mode
SM1
3
0
Serial transmission clock source (UART)
Serial transmission mode
Wakeup function
Receiving function
Transmission data bit8
Note: The clock selection for the I/O
Handshake function (
00 Timer TMRA0 match detect signal
01 Baud rate generator
10 Internal clock f
11 External clock (SCLK0 input)
00
01
10
11
0
1
0
1
0
1
9-bit UART
Interrupt generated when
data is received
Interrupt generated only
when SC0CR<RB8> = 1
Receive disabled
Receive enabled
Disabled (Always transferable)
Enabled
I/O interface mode
UART mode
interface mode is controlled by the
serial bontrol register (SC0CR).
SM0
2
0
Serial transmission clock
(UART)
00: TMRA0 trigger
01: Baud rate
10: Internal clock f
11: External clcok
SC1
SYS
generator
(SCLK0 input)
1
0
7-bit mode
8-bit mode
9-bit mode
CTS
pin)
TMP91C820A
Other modes
2008-02-20
SC0
Don’t care
0
0
SYS

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