TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 133

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

3.8
(Direct address assigned
Note: SDRAM must be mapped in LOCAL1 area. It can’t use other area.
built-in type LCD driver)
Option program ROM
Extended memory 1
Extended memory 2
Extended memory 3
Extended memory 4
Program ROM
Data ROM
Purpose
Data RAM
External Memory Extension Function (MMU)
areas.
extended chip select pins (
A23) which are common specification of TLCS-900 family and 4 chip select pins (
output from CS/WAIT controller.
This is MMU function which can expand program/data area to 136 Mbytes by having 4 local
Address pins to external memory are 2 extended address bus pins (EA24, EA25) and 8
The feature and the recommendation setting method of two types are shown below.
In addition, “AH” in the table is the value which number address 23 to 16 displayed as hex.
Used local area, BANK number
Used local area, BANK number
Used local area, BANK number
Used local area, BANK number
Used local area, BANK number
Used local area, BANK number
Used local area, BANK number
Used local area, BANK number
Maximum memory size
Maximum memory size
Maximum memory size
Maximum memory size
Maximum memory size
Maximum memory size
Maximum memory size
Maximum memory size
Setting CS/WAIT
Setting CS/WAIT
Setting CS/WAIT
Setting CS/WAIT
Setting CS/WAIT
Setting CS/WAIT
Setting CS/WAIT
Setting CS/WAIT
Used
Used
Used
Used
Used
Used
Used
Used
CS2A
Item
CS
CS
CS
CS
CS
CS
CS
CS
pins
pin
pin
pin
pin
pin
pin
pin
to
91C820A-131
CS2G
and
CSEXA
LOCAL3 (AH = 80 − BF: 4 Mbytes × 24 BANK)
LOCAL2 (AH = C0 − DF: 2 Mbytes × 7 BANK)
LOCAL1 (AH = 40 − 5F: 2 Mbytes × 7 BANK)
LOCAL0 (AH = 10 − 1F: 1 Mbyte × 7 BANK)
CS2B
Recommendation setting method
) in addition to 24 address bus pins (A0 to
D1BSCP, D2BLP, D3BFR, DLEBCD
256 Kbytes (256 Kbytes × 1 pcs)
,
256 Kbytes (64 Kbytes × 4 pcs)
96 Mbytes (16 Mbytes × 6 pcs)
16Mbytes (16 Mbytes × 1 pcs)
16 Mbyte (16 Mbytes × 1 pcs)
Setup AH = 30 − 3F to
Setup AH = 30 − 3F to
Setup AH = 30 − 3F to
CS2C
8 Mbytes (8 Mbytes × 1pcs)
Setup AH = 80 − FF to CS2
Setup AH = 80 − FF to CS2
Setup AH = 40 − 7F to CS1
Setup AH = 00 − 1F to CS3
Setup AH = 20 − 2F to CS0
1 Mbyte (1 Mbyte × 1 pcs)
,
CS2D
512 Kbytes
CSEXA
CS2A
None
None
None
None
None
CS1
CS3
CS0
,
CS2E
,
CS2F
CSEX
CSEX
CSEX
,
TMP91C820A
CS2G
CS0
2008-02-20
to
CS3
)