TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 25

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TMP91xy20AFG

Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy20AFG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
(High-speed clock gear changing)
necessary the warm-up time until changing after writing the register value.
executed by the clock gear before changing. To execute the instruction next to the clock gear
switching instruction by the clock gear after changing,input the dummy instruction as follows
(Instruction to execute the write cycle).
To change the clock gear, write the register value to the SYSCR1<GEAR2:0> register. It is
There is the possibility that the instruction next to the clock gear changing instruction is
(Example)
SYSCR1
(2) Clock gear controller
is set according to the contents of the clock gear select register SYSCR1<GEAR0:2> to
either fc, fc/2, fc/4, fc/8 or fc/16. Using the clock gear to select a lower value of f
reduces power consumption.
When the high-frequency clock fc is selected by setting SYSCR1<SYSCK> = 0, f
SYSCR1
X: Don’t care
Example 3:
EQU
LD
LD
Instruction to be executed after clock gear has changed.
EQU
LD
LD
Changing to a high-frequency gear
00E1H
(SYSCR1), XXXX0001B
(DUMMY), 00H
00E1H
(SYSCR1), XXXX0000B
(SYSCR1), XXXX0100B
91C820A-23
;
;
Changes f
Dummy instruction.
;
;
Changes f
Changes f
SYS
to fc/4.
SYS
SYS
to fc/2.
to fc/32.
TMP91C820A
2008-02-20
FPH
FPH

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