TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 247

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

Logic address
3.14.4.3 Memory Mapping
400000H
Horizontal pan
600000H
Row
address
parts; upper, middle and lower. Each area calls A, B and C area that has some
characteristics showing below.
LCD start/end address registers (See Table 3.14.2). (C area can be defined only start
address.)
area are disable, the C area take over all panel space.
is defined as all C area (That is A and B area are disable), C area is shifted to under
the LCD panel and A area is inserted from the top of the LCD panel. Similarly if the B
area set to enable while the panel area is defined as all C area, B area is inserted from
the bottom of the C area overlapping.
Figure 3.14.2 Memory Mapping from Physical Memory to LCD Panel
Yb
Ya
The LCDC can display the LCD panel image which is divided horizontally into 3
Start/end address of each area in the physical memory space can be defined in the
A and B areas are selectable enable or not in LCDMODE register. When A and B
The displaying priority is A > B > C. If the A area set to enable while the panel area
Horizontal pan
A area
B area
Yc
C area
Column address
Memory Map
Image
2X
91C820A-245
Reserved area for horizontal pan of C
area
* Display data cannot input closely when
C area
A area
B area
LCD Panel
Image
X
TMP91C820A
2008-02-20
Ya
Yc
Yb